English
You are here:
14-bit 1-channel 100/125 MSPS pipeline ADC
The high-speed 14-bit ADC employs a high-performance differential pipeline architecture.
The ADC consists of a core ADC, LVDS clock receiver, reference voltages and currents circuit. The ADC requires 1.62 ÷ 1.98 V analog supply and 0.9 ÷ 1.1 V, 1.62 ÷ 1.98 V digital supply voltages.
This ADC supports standby mode which allows state with minimum power consumption. There is also the ability to configure the operating modes of the ADC with digital registers: register ref<3:0> controls the differential reference voltages, register ish<3:0> adjusts current of the sample and hold, register iadc<3:0> adjusts current of the core ADC.
The device is manufactured on TSMC 90 nm MS CMOS technology.
The ADC consists of a core ADC, LVDS clock receiver, reference voltages and currents circuit. The ADC requires 1.62 ÷ 1.98 V analog supply and 0.9 ÷ 1.1 V, 1.62 ÷ 1.98 V digital supply voltages.
This ADC supports standby mode which allows state with minimum power consumption. There is also the ability to configure the operating modes of the ADC with digital registers: register ref<3:0> controls the differential reference voltages, register ish<3:0> adjusts current of the sample and hold, register iadc<3:0> adjusts current of the core ADC.
The device is manufactured on TSMC 90 nm MS CMOS technology.
View 14-bit 1-channel 100/125 MSPS pipeline ADC full description to...
- see the entire 14-bit 1-channel 100/125 MSPS pipeline ADC datasheet
- get in contact with 14-bit 1-channel 100/125 MSPS pipeline ADC Supplier
100/125 MSPS 14-bit ADC IP
- 12-bit, 14-bit, Low Speed SAR ADC in GlobalFoundries (40nm, 22nm, 12nm)
- 12-bit, 14-bit, Low Speed SAR ADC in TSMC (90nm, 55nm, 40nm, 28nm)
- 14bit 4Gsps silicon proven High performance Current Steering DAC IP Core
- Compact area 14bit IQ High Speed 10.3bit ENOB High performance Silicon Proven DAC IP Core