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14-bit 40MS/s Ultra-Efficient SAR ADC - TSMC 65nm LP
The S3ADS40M14BT65LP is a low-power 14-bit High- Speed SAR ADC IP.
This 14-bit ADC, working at 40MS/s sampling rate, features an excellent performance including 75.0dB SFDR, -75.0dB THD, 71.0dB SNR and 11.3-bit ENOB (noise integrated up-to Nyquist).
This high-end performance is obtained while dissipating only mW.
A built-in calibration algorithm enhances the ADC performance and for additional flexibility, an SPI interface is available to read in/out the calibration coefficients.
The S3ADS40M14BT65LP does not require any special analog options, and can be cost-effectively ported across foundries and process nodes upon request
This 14-bit ADC, working at 40MS/s sampling rate, features an excellent performance including 75.0dB SFDR, -75.0dB THD, 71.0dB SNR and 11.3-bit ENOB (noise integrated up-to Nyquist).
This high-end performance is obtained while dissipating only mW.
A built-in calibration algorithm enhances the ADC performance and for additional flexibility, an SPI interface is available to read in/out the calibration coefficients.
The S3ADS40M14BT65LP does not require any special analog options, and can be cost-effectively ported across foundries and process nodes upon request
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Block Diagram of the 14-bit 40MS/s Ultra-Efficient SAR ADC - TSMC 65nm LP
