The 16-bit Sigma-Delta ADC is an ultra-low power 16-bit sigma-delta ADC IP for sensor applications, operating up to 1MS/s with a 122Hz output data rate. This ADC dissipates only 225uW over a 1.2V supply. The SNDR is 100dB for an input signal bandwidth of 1kHz.
The architecture employs a mixed Clock- Boosting/Switched-Opamp second-order SD modulator. A chopping technique is employed to reduce noise.
The block includes a Sinc decimation filter. The output data rate is set to 122Hz, with valid conversions available every 8.2ms. The filter can be customized to meet different customer’s requirements.
The design is implemented with Deep N-Well to improve substrate isolation.
The 16-bit Sigma-Delta ADC can be cost-effectively ported across foundries and process nodes upon request.
- GlobalFoundries 65nm LPe RFCMOS
- 6 Metals Used
- Single 1.2V Supply
- 16-bit Sigma-Delta ADC
- 122S/s Output Word Rate
- 1.5Vpp Diff. Input Range
- Only 225uW Power Dissipation at 122S/s
- SNDR= 100dB over 1kHz Bandwidth
- SFDR= 106dB over 1kHz Bandwidth
- Power-Down Mode
- Compact Die Area
- Sensor Interfacing (DC signals)
Block Diagram of the 16-bit 100dB SNDR Sigma-Delta ADC - GlobalFoundries 65nm