MIPI DPHY Gen2 Rx-Only 4 Lanes - TSMC 28HPC, HPM, LP 1.8V, North/South Poly Orientation
16-Bit, 16kSPS SD ADC
Figure 1 shows a functional diagram of the L55CSD16B16K. The SD ADC block consists of multiplexers, reference circuits, a fourth-order SD modulator with fully differential architecture and digital decimation filter. The input range of the ADC is limited to between the top-level reference voltage and the bottom-level reference voltage at GP.
Considering the sampling rate of 16kS/s with 1kHz input and full scale input range, the L55CSD16B16K features dynamic performance of the 90dB SNR at Analog Mic path (AMIC).
Features
- 55nm 2P7M SMIC CMOS technology
- Programmable Gain : 0 to 50dB
- Selectable Microphone bias : -1.3V/2.5V 2.9V
- Mono Audio input
- 4-channel GP fully-differential inputs
- 16-bit resolution
- 16kS/s conversion rate
- Digital serial interface : PDM / I2S / TDM
- Analog input range : AVSS to AVDD @GP
- Current consumption : 2.0mA @typ, analog
- Current consumption : 0.2mA @typ, digital
- SNR : 90dB @AMIC
- Power-down current : < 1μA
- Analog Supply : 1.8V to 3.6V
- Digital Supply : 1.2V
- Core Size : 0.4275mm2 @Analog
- Core Size : 0.0625mm2 @Digital
Deliverables
- GDSI, GDSII
- Verilog-model
- Datasheet
- Test plan
Applications
- Audio
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