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16nm LVCMOS Bidirectional IO
Sankalp Semiconductor offers SSLVCMOSBIDI_IO_T016FFC general purpose IOs targeted for TSMC 16nm FFC process
Features
- Implemented in TSMC 16FFC process
- Uses SVT,LVT devices for operation under both core and IO supply
- Intended for flip-chip packages
- Compatible with both IEEE General Purpose LVDS
- Powered from 1.8V +/- 7.5% IO supply and 0.8V +/- 10% or 1.0V -10% & +5% Core supply
- Operates in junction temperature ranges from -40 to 125 degree Celsius
- No power supply sequencing restrictions
- ESD immunity of 2KV HBM, 250V (5A) CDM and +/- 100mA current injection for latch up
Deliverables
- Specifications
- GDSII
- LEF file
- LVS netlist
- Verilog Model
- Timing Model
- Documentation
View 16nm LVCMOS Bidirectional IO full description to...
- see the entire 16nm LVCMOS Bidirectional IO datasheet
- get in contact with 16nm LVCMOS Bidirectional IO Supplier
16nm
- USB 3.1 PHY (10G/5G) - TSMC 16FFC x1 OTG, North/South Poly Orientation
- MIPI D-PHY 2.0Gbps (4-lanes TX/RX, PLL integrated) TSMC 16FF+LL
- MIPI D-PHY 2.0Gbps (4-lanes RX) TSMC 16FF+LL
- MIPI D-PHY 2.0Gbps (4-lanes TX, PLL integrated) TSMC 16FF+LL
- TSMC CLN16FFCLL 16nm Clock Generator PLL - 700MHz-3500MHz
- HBM Subsystem IP Gen2
