This G709D-2.5 core is specifically designed to efficiently perform the Reed-Solomon decoding function specified by the ITU G.709 standard.
- 2.5 Gbits/sec operation in .13 micron CMOS process
- 40 K gates in .13 micron using a typical standard cell library
- 332 Mhz clock at 2.5 Gbits/sec
- 8 input and output data interfaces
- One-edge, one-clock fully synchronous design without multi-cycle paths
- Separate FIFO for increased flexibility and simplified IC floor planning
- Complete error reporting for Bit Error Rate calculation and feedback into threshold detection circuits