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2.5G/1000M/100M/10M Quad-Mode MAC
The fully integrated 2.5G/1000M/100M/10M Quad-mode Media Access Controller (MAC) core for Ethernet applications is compliant with IEEE 802.3 standard and RGMII specifications. The PHY interface supports both RGMII and GMII interfaces. This Quad-Mode Core is configurable through software register.
The west-bound interface from the MAC provides a configurable 32-bit system interface.
The east-bound interface performs the mapping of transmit and receive data streams (at the PHY layer) to the on-chip SERDES or external PHY chip.
The west-bound interface from the MAC provides a configurable 32-bit system interface.
The east-bound interface performs the mapping of transmit and receive data streams (at the PHY layer) to the on-chip SERDES or external PHY chip.
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Block Diagram of the 2.5G/1000M/100M/10M Quad-Mode MAC
Ethernet MAC IP
- Gigabit Ethernet 802.3 MAC - Media Access Controller
- Multi-channel, multi-speed Ethernet universal media access control (MAC) and physical coding sublayer IP (UMAC)
- 400G/200G/100G Ethernet MAC
- Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto
- 10 Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto
- 40G/100G Ethernet PCS/MAC IP Cores