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2.8 Gbps LVDS IO
The LVDS I/O is a single macro (input, output and reference block). Both driver and receiver operating up to 1.4GHz (2.8 Gbps ). The Driver is designed to drive 100Ω differential termination.
Features
- Powered from 1.8V ±5% and 0.9V(±10%) core power supplies
- Operates up to 1.4GHz (2.8Gbps)
- Powered from 1.8V ±5% and 0.9V (±10%) core power supplies
- PADS include ESD structures
Benefits
- Different bump options for optimum usage of I/O ring
- Power down feature for saving power
Deliverables
- Abstract - LEF
- Behavioral model - Verilog
- Timing model - .LIB
- LVS model - CDL
- Physical - .GDS2
Applications
- Chip to Chip interface on a PCB or similar applications
Block Diagram of the 2.8 Gbps LVDS IO IP Core
View 2.8 Gbps LVDS IO full description to...
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