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Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
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24.84 MHz phase-frequency detector with charge pump
The device consists of phase frequency detector (PFD), charge pump and lock detector (LD) PFD compares phases of a divided VCO signal and a divided reference oscillator signal. PFD feeds control signal to charge pump at signals mismatch. Charge pump output current forms VCO control voltage.
Lock detector forms output logical “1” at input signals phase coincidence.
The block is fabricated on SMIC CMOS 0.18 um technology.
Lock detector forms output logical “1” at input signals phase coincidence.
The block is fabricated on SMIC CMOS 0.18 um technology.
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