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Low latency Network TAP IP-Core for full duplex 100M/1G Ethernet links
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24bit Audio ADC/24bit Video DAC, SMIC 55LL
The Innosilicon Codec is a low power, high resolution, single-chip stereo CODEC that employs the high order Sigma-Delta noise shaping technique. The ADC, DAC and power amplifier are integrated to provide total solutions. With 24bit resolution for DAC and 18 bit resolution for ADC, this IP is suitable for applications in consumer digital audio systems, automobile audio, multimedia and digital systems. The key feature is high performance, low power and low cost.
Features
- Logic process, no need for mixed signal process
- 24 bit High Order Sigma-Delta modulation for DAC for >95 dB SNR
- 18 bit High Order Sigma-Delta modulation for ADC for >92 dB SNR
- Line-in, Microphone for ADC and Speaker Interface for DAC output
- Standard I2S digital interface supporting: 16 bit, 18 bit, 24 bit I2S
- 128 times oversampling for low power operation
- On-Chip Analog Post Filter and digital filters with full range of gain tuning
- Single–ended or differential Input and Output
- Sampling Rate of 8kHz/12kHz/16kHz/ 24kHz/32kHz /48kHz/44.1KHz/96KHz
- Support 16ohm to 32ohm Head Phone and Speaker Phone Output
- Optional Fractional PLL to support any clock generation
- Can be used for Mono, stereo, 5.1 and 7.1 Hi-Fi
- SMIC 0.18um to 55nm and TSMC 65nm/55nm
Benefits
- High resolution
- Low Cost
- Easy integration
- FPGA Integration Support
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