28 nm Bulk CMOS IP - V- & E-band mmWave components
Each component’s layout is fully parameterized (PCell-based) and code-generated (incl. density fill and DRC compliance). There are no "hand-drawn" features. This allows for easier scalability, rapid integration, layout fine-tuning and detailed EM/linear/non-linear/stability design verification. All IP blocks are compatible with OA EDA tools, incl. Keysight ADS, Synopsys & Cadence. In addition, a full Keysight ADS workspace incl. all relevant testbenches and models is available for each component.
Physical bare-dies are available upon request
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Block Diagram of the 28 nm Bulk CMOS IP - V- & E-band mmWave components
PA IP
- 2-stage Power Amplifier 14.5GHz ultra-efficient Dual-Drive™ PA
- 2-stage Power Amplifier 28GHz ultra-efficient Dual-Drive™ PA
- 2-stage Power Amplifier 39GHz ultra-efficient Dual-Drive™ PA
- Advanced DPA- and FIA-resistant FortiMac HMAC SHA2 IP core
- PA detector - GlobalFoundries 130nm RFSOI
- 915MHz - 930MHz RPA12C Single stage low power low current PA