Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
32-bit Deeply Embedded Processor
The BA22-DE uses separate instruction and data buses, and it has a pipeline depth of 4 or 5 stages depending on its configuration. The processor connects to the system via AMBA® AHB™, AXI4™, or Wishbone interfaces. It is also equipped with dedicated Quick Memory (QMEM) interfaces to tightly-coupled memories, which offer fast and deterministic access to code and data, and can be used for inter-core communication in a multi-core architecture. Its base version includes 16 to 32 general-purpose registers (GPRs), a tick-timer (TTimer), a programmable interrupt controller (PIC), an advanced power management unit (PMU), and optionally a debug unit (DBGU). The core’s processing capabilities can be enhanced further with the optional hardware multiplier (MUL), divider (DIV), Multiply-Accumulate (MAC), IEEE 754 compliant floating-point, and DSP instructions acceleration units. Its interrupt response time can also be optimized with the addition of a Vectored Interrupt controller (VIC).
The BA22-DE supports the variable instruction length BA2 instruction set, benefits from its extreme code density, and is binary compatible with other members of the BA2x processor family. Programming is facilitated with the included C/C++ tool chain, Eclipse IDE, architectural simulator, and ported C libraries. Advanced debugging capabilities and off-the-shelf development boards can further ease software development.
Additional microcontroller peripherals may be ordered for pre-integration and delivery with the core, individually or in a complete platform. IP Integration Services are also available to help integrate any BA22 processor configuration with memory controllers, image compression, or other CAST IP cores.
Part of the royalty-free BA2x family, the BA22-DE processor core has been designed for easy reuse and integration, has been rigorously verified, and is production proven.
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Block Diagram of the 32-bit Deeply Embedded Processor IP Core
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