40G G975.1 I.4 Enhanced FEC Core

The Xelic native 40Gb/s I.4 Enhanced Forward Error Correction (EFEC) Core (XCO3EFEC4) generates codeword parity bits and performs error detection and correction for OTN OTU3 frames. The XCO3EFEC4 contains independent encoder and decoder functions with interleaved BCH and Reed Solomon algorithms. The XCO3EFEC4 is compliant with the G975.1.I.4 specification. Corrected and Uncorrected codeword detection is provided along with configurable High BER status information. Line and system side data is transferred at an OTU3 rate using a 128-bit data bus operating at 334.66MHz.

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