English
You are here:
40nm Low Leakage VHS, Channel Length 50nm, LVT Logic Process Standard cell Library
SMIC 40nm Low Leakage VHS, channel length 50nm, LVT Logic Process Standard cell Library
View 40nm Low Leakage VHS, Channel Length 50nm, LVT Logic Process Standard cell Library full description to...
- see the entire 40nm Low Leakage VHS, Channel Length 50nm, LVT Logic Process Standard cell Library datasheet
- get in contact with 40nm Low Leakage VHS, Channel Length 50nm, LVT Logic Process Standard cell Library Supplier
Standard Cell IP
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 7 track Ultra High Density standard cell library at TSMC 28 nm
- 7 track Ultra High Density standard cell library at TSMC 28 nm HPC+