Low Drop Out 5mA Regulator in TSMC 180nm
The S3REG54HVT18 is a regulator circuit that features an automatic feedback sensing option to maintain a constant regulated output voltage level. It has been designed to provide a stable output in both low-drop and high-drop operation, while maintaining minimum ripple on supply lines in the presence of large load current spikes inherent with switching loads, e.g. high-speed ADCs.
The S3REG54HVT18 has been designed to allow low-drop operation (the LDPMOS pass device has been scaled for a voltage drop of 500mV). To achieve these goals, the S3REG54HVT18 requires a 1F external ceramic capacitor.
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Block Diagram of the Low Drop Out 5mA Regulator in TSMC 180nm
