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High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for UMC 28HLP
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5G LDPC Encoder / Decoder
TC5200 is an efficient LDPC encoder/decoder Core solution fully compliant with 3GPP NR (5G) specifications. The Core is fully validated and has been selected by several early adopters for their 5G SoC.
Features
- CRC encoding
- Filler bits insertion/removal
- LDPC encoding (basegraph1 and 2, all Z-values)
- Rate matching (incl. repetition)
- Bit-level interleaver
- Support of WiFi (optional)
- Transport Block level processing (optional)
- Advanced HARQ combining / stream compression
- Versatile Decoding algorithm profiles
- Scalable throughput design
- Multi-Gigabit range throughput
- Scalable design (three throughput profiles)
Applications
- 3GPP NR (5G) base station
- 3GPP NR (5G) terminal
- WiFi compliant
View 5G LDPC Encoder / Decoder full description to...
- see the entire 5G LDPC Encoder / Decoder datasheet
- get in contact with 5G LDPC Encoder / Decoder Supplier
5G
- USB 3.1 PHY (10G/5G) - TSMC 16FFC x1 OTG, North/South Poly Orientation
- 5G NR IP Platform for Smartphones and Broadband Connected Devices
- USB 3.1 PHY (10G/5G) - TSMC 16FF+LL x1 OTG, North/South Poly Orientation
- High performance, energy efficient 6-issue, 64-mac vector DSP core targeted for 4G/5G advanced wireless terminal and Infrastructure applications with scalable vector processing based on the fourth generation ZSP architecture
- High performance, energy efficient 4-issue, 32-mac vector DSP core targeted for 4G/5G wireless terminal and Infrastructure applications with scalable vector processing based on the fourth generation ZSP architecture
- High performance, energy efficient 4-issue, 16-mac vector DSP core targeted for 4G/5G wireless terminal and Infrastructure applications with scalable vector processing based on the fourth generation ZSP architecture
