The PLL13G is a ultra-low power phase locked loop (PLL) intellectual property (IP) block.
It features a very small area footprint, with exceptional jitter performance in its power/area class, and widely flexible programmability, making it ideal for a wide range of general purpose clocking and specialized applications. The PLL13G is optimized for use in high-performance imaging systems, such as high-speed image sensors.
The cost-effective IP block has been designed and verified in a
130 nm CMOS process.
Available as IP and Integrated Circuit.
- Input Frequency: 5.5 GHz
- Output Frequency: 13.5 GHz
- Period Jitter: 0.38 ps
- Hard IP Block
- TSMC 130 nm process
- Radiation Tolerant version available: PLL13GRH
- Save time-to-market with our ready-to-go complete product solutions for your commercial or radiation tolerant specifications demands. Our IP uses the latest technology nodes for easy integration, or upon request, can be ported to other nodes.
- Our IC project teams will become an extension of your system development group, allowing you to focus on your overall end products.
- Silicon Validation Report
- Layout View (gds2)
- Integration Support
- Imaging Systems:
- CMOS & CCD Image Sensor Readout
- Infrared FPA Readout
- Medical Imaging Applications
- 5G Cellular Base Stations
- Communications and Networking:
- Microwave Receivers
- Radar and Satellite Communications
- Sensor/Detector Readout Applications
- Automotive Applications
- Noisy System-on-Chip environments