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64-Bit RISC-V High Performance Processor
UX600 Series is also highly configurable for customers to add or remove hardware feature to optimize for their SoC.
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Block Diagram of the 64-Bit RISC-V High Performance Processor IP Core
RISC-V Processor IP
- A High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP
- RISC-V processor - 32 bit, 5-stage pipeline
- Compact RISC-V Processor - 32 bit, 3-stage pipeline, 16 registers
- Compact RISC-V Processor - 32 bit, 3-stage pipeline, 32 registers
- Low-power 32-bit RISC-V processor
- RISC-V processor with vector extension certified for ISO 26262 ASIL D ready