8 bit 125 MSPS Dual Pipeline ADC

Features

• 65nm 6 Metal TSMC CMOS LP (no analog options)
• Compact Area and Low Power Operation
• 1.2V power supply
• 1 Vpp differential input range
• Dual 125MSPS operation
• DNL +/-0.5 LSB
• INL +/- 1 LSB
• Stand-by and power down modes
• Analog test input signal port
• Scan test for digital section

Deliverables

• Datasheet
• Characterization Report
• Flat Netlist (cdl)
• Layout View (gds2)
• Abstract View (lef)
• Timing View (tlf)
• Behavioral Model (VHDL/Verilog)
• Silicon Samples
• DemonstrationEvaluation Board
• Integration Support

• see the entire 8 bit 125 MSPS Dual Pipeline ADC datasheet
• get in contact with 8 bit 125 MSPS Dual Pipeline ADC Supplier