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PHY IP for Bluetooth low energy, Thread, and Zigbee in TSMC (40nm, 55nm)
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8 bit 125 MSPS Dual Pipeline ADC
Features
- 65nm 6 Metal TSMC CMOS LP (no analog options)
- Compact Area and Low Power Operation
- 1.2V power supply
- 1 Vpp differential input range
- Dual 125MSPS operation
- DNL +/-0.5 LSB
- INL +/- 1 LSB
- Stand-by and power down modes
- Analog test input signal port
- Scan test for digital section
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