The DF6802 is a 8-bit synthesisable MPU IP Core, software-compatible with the Motorola MC6802. The DF6802 has an enhanced internal architecture, which allows it to execute the code approximately 4 times faster than original 6802 running at the same clock frequency.
Two software-controlled power-saving modes - WAIT and HALT, are available to conserve additional power. These modes make the DF6802 IP Core especially attractive, for automotive and battery-driven applications.
The DF6802 has built-in real time hardware on chip debugger DoCD , allowing easy software debugging and validation.
The DF6802 is fully customizable - it is delivered in the exact configuration, to meet user's requirements. There is no need to pay extra, for not used features and wasted silicon. It includes fully automated testbench with complete set of tests, allowing easy package validation, at each stage of SoC design flow.
Each of the DCD's D68XX Core has a built-in support for DCD Hardware Debug System, called DoCD . It is a real-time hardware debugger, which provides debugging capability of a whole System on Chip (SoC).
Unlike other on-chip debuggers, the DoCD provides a non-intrusive debugging of running application. It can halt, run, step into or skip an instruction, read/write any contents of microprocessor.
- Improved, 4 times faster architecture
- Software compatible with industry standard MC6802
- De-multiplexed Address/Data Bus to allow easy memory connection
- Two power saving modes: HALT, WAIT
- Fully synthesizable
- Static synchronous design
- No internal reset generator or gated clock
- Scan test ready