802.11n (MIMO WLAN) LDPC decoder / encoder

Features

• Code length: 648, 1296, 1944.
• Code rates: 1/2, 2/3, 3/4, 5/6 (for each code length).
• Programmable number of iterations.
• Internal convergence test stops the decoder when data is fully recovered (0 errors), to save power and increase throuhgput.
• High throughput support - up to 360Mbps.
• encoder included
• Code synthesizable to ASIC and FPGA.

Deliverables

• Verilog/VHDL source code or verilog EDIF netlist.
• Extensive testing environment (test bench + stimuli generator).
• Matlab model.
• Synthesis script for Synopsys Design Compiler
• Detailed documentation.