Aeonic Generate Adaptive Workload Manager [PLL] actively adapts to workload changes to boost silicon performance

The Movellus™ Aeonic Generate Adaptive Workload Module (AWM) family of high-performance clock generation IP products are part of the Aeonic Intelligent Clock Network™ architecture. Designed for high reliability and fully SCAN enabled, the AWM provides extensive visibility and controllability of key clocking metrics.

Movellus AWMs have the optimal Power, Performance, and Area (PPA) characteristics needed for high-performance, power-efficient SoC clocking applications. The Aeonic Generate AWM family supports glitchless frequency
changes for Dynamic Voltage and Frequency Scaling (DVFS) applications and rapidly change frequencies for droop response, improving both performance and power efficiency. The AWM clock generator provides eight unique clock outputs in the smallest area possible.

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