A random number generator core suitable for cryptographic applications such as producing keys and other critical security parameters. The core implements the CTR-DRBG (Counter mode - Deterministic Random Bit Generator) specified in NIST SP-800-90A using Algotronix' AES-G3 core as the AES engine.
- Supports Derivation Function (DF)
- Supports Prediction Resistance
- 128, 192 or 256 bit AES key
- It can be combined with other AES-G3 based products such as the AES-Keywrap core and AES-GCM itself to create a hardware security subsystem which makes efficient use of the AES engine.
- VHDL Source code and testbench
- Random number generation for cryptographic applications.