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14-bit, 4.32Gsps Ultra high speed Wideband, Time-Interleaved Pipeline ADC IP
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AES Core
AES IP is a AES Engine compliant to NIST FIPS-197 Advanced Encryption Standard. The IP can be programmed to encrypt or decrypt a 128-bit blocks of data using a 128-bit, 192-bit or 256-bit key.
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Block Diagram of the AES Core IP Core
AES IP
- UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8
- FortiCrypt AES SX Series IP Core
- Tunable AES (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection
- AES-ECB-CBC-CFB-OFB-CTR-GCM-XTS-CCM Crypto Accelerator
- DPA Resistant AES Core
- AES + SHA DMA Crypto Accelerator