RISC-V-based AI IP development for enhanced training and inference
AES-ECB 1 Billion Trace DPA & Fault Injection Resistant Crypto Accelerator
The DPA Resistant Hardware cores offer chipmakers an easy-to-integrate technology-independent soft-macro security solution with built-in side-channel resistance for cryptographic functions across a wide array of devices.
These high-performance cores provide a higher level of protection than standard security cores, while improving time-to-market, as all the cores are validated DPA countermeasures. It is highly flexible for integration with standard cipher modes such as Cipher Block Chaining (CBC), Counter (CTR) and Authenticated Encryption mode / Galois Counter (GCM) modes. The fast AES core performs AES encryption with DPA protection using only 2 clock cycles per AES round, outperforming any existing solution.
View AES-ECB 1 Billion Trace DPA & Fault Injection Resistant Crypto Accelerator full description to...
- see the entire AES-ECB 1 Billion Trace DPA & Fault Injection Resistant Crypto Accelerator datasheet
- get in contact with AES-ECB 1 Billion Trace DPA & Fault Injection Resistant Crypto Accelerator Supplier