The EIP-39 AES Accelerators implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling and GHASH. Besides the basic feedback modes such as CBC, CFB, OFB, and CTR, the EIP-39 also provides CCM and CMAC and optionally GCM, XTS, f8 and f9.
Designed for fast integration, low gate count, and maximum performance, the AES Engines provide a reliable and cost-effective AES IP solution that is easy to integrate into SoC designs. The EIP-39 core is also available in configurations with protection for Side Channel Attacks, including Fault Injection. These provide additional protection against attacks in environments in which the SoC can be attacked, while its active keys may not be revealed.