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AES Crypto Engine IP Core (ECB, CTR, CBC, CFB, OFB, XTR, CCM, GCM, OMAC)
The AES Crypto Engine IP Core is based on a very flexible wrapper. This wrapper supports a wide selection of programmable ciphering modes: ECB, CTR, CBC, CFB, OFB, OMAC, CCM, GCM, XTS, ...
For easy integration, the AES Crypto Engine IP Core offers a large choice of data interfaces: FIFO, DMA, AXI4-Stream,…
The AES Crypto Engine IP Core is an easy-to-use solution with predictable resources and performances on ASIC and FPGA.
For easy integration, the AES Crypto Engine IP Core offers a large choice of data interfaces: FIFO, DMA, AXI4-Stream,…
The AES Crypto Engine IP Core is an easy-to-use solution with predictable resources and performances on ASIC and FPGA.
Features
- ASIC and FPGA
- Supports a wide selection of programmable ciphering modes based on NIST SP 800-38:
- Non-chaining modes: ECB, CTR
- Chaining modes: CBC, CFB, OFB
- Cyphertext stealing modes: CBC-CS
- Authentication: CMAC (OMAC1)
- Authentication & Confidentiality: CCM, GCM
- Confidentiality on storage devices: XTS/XTS-CS
- Masking option available with excellent protection against SPA & DPA
- Context switching
- Data interface: AMBA (AHB/AXI:AXI-4) with optional DMA
- Control interface: APB or AXI4-lite
Benefits
- Unrivaled speed performance
- Optimal and tailored implementation to your needs
- Highest performance/area ratio for a large range of applications
- Reconfigurable and scalable features
- Portable and optimized to ASIC or FPGA technology
- Upgradeable to new performance requirements or to new generations of ASIC or FPGA technology
Deliverables
- Netlist or RTL
- Scripts for synthesis
- Self-checking TestBench based on FIPS vectors
- Datasheet
- Integration guide
Applications
- Ideal for any application, examples:
- Wireless and wired communications
- Digital Cinema
- DRM
- Encrypted data storage
- Industrial
- Cloud computing
- Defence
- Automotive
- General MCU’s
- Etc…
Block Diagram of the AES Crypto Engine IP Core (ECB, CTR, CBC, CFB, OFB, XTR, CCM, GCM, OMAC)
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