AES-XTS encryption/decryption IP
The design is fully synchronous and supports independent, non-blocking encryption/decryption at main memory speed. SphinX is available for immediate licensing.
References:
IEEE Std 1619-2018, IEEE Standard for Cryptographic Protection of Data on Block-Oriented Storage Devices https://standards.ieee.org/standard/1619-2018.html
NIST FIPS 197, Advanced Encryption Standard (AES) https://www.nist.gov/publications/advanced-encryption-standard-aes
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Block Diagram of the AES-XTS encryption/decryption IP IP Core
Cryptography IP
- Secure-IC Securyzr™ Tunable Cryptography solutions with embedded side-channel protections: AES - SHA2 - SHA3 - PKC - RSA - ECC - Crystals Kyber - Crystals Dilithium - XMSS - LMS - SM2 - SM3 - SM4 - Whirlpool - CHACHA20 - Poly1305
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- Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
- Cryptography Accelerator
- Post-Quantum Cryptography Processing Engine (PQP-HW-LAT)