The Cadence 802.11n/ac/ad Tri-Band AFE IP is designed for wireless connectivity and is capable of supporting high-speed WiFi (802.11n™, ac, and ad) applications.
Implemented on the TSMC 28HPC process the AFE IP incorporates a dual 7-bit ADC, a dual 7-bit DAC, a PLL, an oscillator, 1:8 data de-multiplexer, 8:1 data multiplexer, and control circuitry. It contains a 3.52GHz PLL, which can operate in either an integer or a Frac-N mode. The Tri-Band Analog Front End IP is based on silicon-proven production Cadence ADC and DAC technology and provides a cost-effective, and power efficient solution for today wireless technology applications.
- Dual 7-Bit, 3.52GSps ADC
- Dual 7-Bit, 3.52GHz DAC
- Low-jitter 3.52GHz LC VCO Integer or Fractional-N PLL
- Low-power operation and small die area
- Wide operating temperature range
- Designed for an eight metal layer stackup
- Analog test bus for preproduction testing
- Fast wakeup from the power-down mode
- FE views— .lib file, Verilog
- GDSII, netlist (Cadence Physical Verification System for LVS and DRC, Footprint (LEF)
- User documentation, integration guidelines, engineering datasheet
- Silicon validation report (where available)
- Integration support