The Expedera Origin E2 is designed for Artificial Intelligence (AI) applications in power sensitive devices such as mobile phones and edge nodes. By using on-chip memory only, the E2 eliminates the requirement for external DRAM access, saving system power while increasing performance, reducing latency and shrinking system BOM costs. It is tunable for specific workloads to provide an optimal performance profile for unique application requirements.
Expedera's scalable tile-based design includes a single controller (SSP), and multiple matrix-math units (MMP), accumulators (PSM), vector engines (VSP) and memory to store the network. Specific configurations depend on unique application requirements. The unified compute pipeline architecture enables highly efficient hardware scheduling and advanced memory management to achieve unsurpassed end-to-end low-latency performance. The patented architecture is mathematically proven to utilize the least amount of memory for neural network (NN) execution. This minimizes die area, improves bandwidth, saves power, and maximizes performance.