CoreAHB is an AMBA bus interface that is used to connect subsystem cores to Microsemi's 32-bit soft processors. The bus interface is easy to use and fully compatible with the AHB protocol. CoreAHB is designed for use in systems where there is 1 - 3 bus masters. The core is small in size and allows easy connection of IP cores in systems built around any ARM processor.
- Implements a multi-master AHB bus fabric
- Support 1 - 3 bus masters
- Supports up to 16 AHB slave devices
- Auto-stitched to bus master and slave devices using SmartDesign IP design tool in Libero IDE
- Supports remapping of Slot0 and Slot1 to facilitate processor boot
- Fully compatible with Cortex-M1, CoreMP7 and AMBA IP cores