ARC software-based hardware safety mechanism for EM Functional Safety processor

The Synopsys ARC Software Test Library (STL) for ARC Processors is a hardware safety mechanism, as defined in the ISO 26262 standard, implemented in software; it is designed to detect random permanent (stuck-at) hardware faults during the execution of mission software. A Software Test Library, also known in the automotive industry as Software Built-In Self-Test (SBST), is an external safety mechanism that, in combination with other processor safety mechanisms, provides the required level of Single Point Failure Metric (SPFM) diagnostic coverage with respect to the target ISO 26262 ASIL. The table below shows possible target ASIL for various Synopsys ARC functional safety (FS) processor families.

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