eSi-ECC is a hardware acceleration core for Elliptic Curve (EC) modular arithmetic operations, which are commonly performed within EC cryptographic protocols; defined in IEEE1363 and other cryptographic standards. These include the EC Digital Signature Algorithm (ECDSA), EC Deffie-Hellman (ECDH) and variations of these protocols.
- Supports any EC over GF(p) of the simplified Weierstrass form that is commonly defined in ECC standards such as NIST, SEC2, Brainpool;
- Supported arithmetic operations: EC Scalar Multiplication (ECSM), EC Addition (ECA), EC Doubling (ECD), Modular Addition (MA), Modular Subtraction (MS), Modular Multiplication (MM), Modular Division (MD), Modular Inversion (MI).
- Supports any key size up to the maximum specified in the pre-synthesis stage;
- Resistant against both Simple and Statistical Timing side channel Attacks (STA), and Simple Power Analysis (SPA) attacks. Optional support for resistance against Differential Power Analysis (DPA) and Doubling Attacks (DA);
- Selection between a ‘small’ and ‘medium’ gate count architectures depending on the processing latency requirements of the application;
- No RAM/ROM blocks used;
- APB interface for loading curve parameters and private key, and unloading the ECSM result.
- Easy integration into eSi-RISC or other microprocessor SoC
- Small size and high performance
- Software libraries