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Multiplexing transceiver with 4 CSI2 inputs and a single CSI2 output
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Audio ADDA IP, 16 bits, Audio Codec, UMC 0.13um HS/FSG process
16-Bit Sigma-Delta Audio Codec, UMC 0.13um HS/FSG Logic process.
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ADC/DAC IP
- 24bit Audio ADC/24bit Video DAC
- Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency
- Audio codec with capacitor-less 101 dB dynamic range ADC and 115 dB SNR DAC with very low latency filters
- Analog Front End: 4 channels of 12-bit 2 GSPS ADC IQ Pairs, 4 channels of 12-bit 2 GSPS DAC IQ Pairs, PVT & Integrated PLL
- Analog Front End: 1 channel of 12-bit 2 GSPS ADC IQ Pairs, 1 channel of 12-bit 2 GSPS DAC IQ Pairs, PVT & Integrated PLL
- 40nm 1.1V AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Clock-PLL