Automotive MIPI A-PHY Source IP - 1-Lane
PHY IP supports the SOURCE function of MIPI A-PHY Gear-2 stated in standard specification. It supports data rate up to 4Gbps with integrated mixed signal circuit, high performance TX driver, embedded TX clock generation, on chip optional termination resistor calibration.
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Block Diagram of the Automotive MIPI A-PHY Source IP - 1-Lane

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