AVC / H.264 Encoder
Features
- Maximal encoding resolution 1280×1080 for any supported format
- Maximal encoding throughput rate 720×480 @ 75fps for any supported format
- Lower resolutions with higher frame rates may also be supported, where the relevant standard permits
- Performance achieveable if sufficient memory bandwidth is available and the target clock rate of 250MHz was achieved in silicon
- Programmable Motion Estimation search range up to +/- 80 pixels horizontally, +/- 64 pixels vertically, with programmable 1, ½ or ¼ pixel precision
- CQ, CBR and VBR encoding modes
- Progressive, interlaced and PAFF encoding support
- Integrated downscaling function to support 1920×1080 input source video
- Integrated content analysis function for scene change detection and adaptive quantization
- Encoded data in elementary stream or frame based entropy coded payload, controlled by FW
- All input images for encoding shall be in semi-planar format with 4:2:2 or 4:2:0 sampled chrominance or in YUY2 4:2:2 mode.
- Compatible with any host CPU, typically ARM926, MIPS4K
- Formats
- 264/AVC, CBP, MP with CABAC support, up to level 3.2, max bit-rate 8Mbps
- MPEG-2, MP/ML, MP/HL, max bit-rate 16Mbps
- MPEG-4 Part 2, SP including short header mode supporting, max bit-rate 12Mbps
- H.263, with programmable extended motion vector range and custom picture size support, max bit-rate 12Mbps
Deliverables
- Bit accurate C models
- Verilog RTL and production firmware
- Synthesis scripts
- Self-checking test environment
- Datasheet and user manual
Block Diagram of the AVC / H.264 Encoder IP Core

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