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Highly powerful, multi-mode communication processor for IoT wireless applications
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AXI Ethernet Lite
The AXI Ethernet Lite MAC supports the IEEE Std. 802.3 Media Independent Interface (MII) to industry standard Physical Layer (PHY) devices and communicates to a processor via AXI4 or AXI4-Lite interface. The design provides a 10 megabits per second (Mbps) and 100 Mbps (also known as Fast Ethernet) Interface, delivering the minimal functions necessary to provide an Ethernet interface with the least resources used.
Features
- Parameterized AXI slave interface based on the AXI4 or AXI4-Lite specification
- Memory mapped direct I/O interface to the transmit and receive data dual port memory
- Media Independent Interface (MII) for connection to external 10/100 Mbps PHY transceivers
- Independent internal 2K byte Tx and Rx dual port memory for holding data for one packet
- Optional dual buffer memories, 4K byte pingpong, for Tx and Rx
- Receive and Transmit Interrupts
- Optional MDIO interface for PHY access
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Embedded IP
- Customizable Embedded Multi-port PCIe Switch
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- Embedded FPGA cores in TSMC 22ULP/28HPC/HPC+
- Deeply embedded processor for deterministic real-time applications
- 32-bit Deeply Embedded Processor
- Embedded FPGA