Included at no additional charge with ISE software. Xilinx AXI4-Stream to Video Out IP core enables video designers to quickly and easily connect video processing blocks that use AXI4-Stream to external video sinks.
The AXI-4 Stream to Video Out LogiCORE™ IP core converts AXI4-Stream interface signals to a standard parallel video output interface with timing signals. The AXI4-Stream interface accepts signals that are compliant to the AXI4-Stream Video Protocol as defined in the AXI Reference Guide (UG761), and as is implemented on most Xilinx Video IP cores. The output interface is suitable for use with many external video sinks and contains standard video timing signals including Vsync, Hsync, Vblank, Hblank, DE and pixel clock. This enables video designers to quickly and easily connect video processing blocks with an AXI4-Stream interface to an external video sink such as a DVI PHY. This core works in conjunction with the Xilinx Video Timing Controller (VTC) core to generate the video format timing signals. Source code is provided with the core to allow customers to adapt the core to work with unique video signals that may not already be included in the core.