The S3BG0V8T90FS3 is a reference circuit which has been designed to provide 0.8V output stable voltage to reduce time to market, risk and cost in the development of Analog Front-Ends and Regulators.
The S3BG0V8T90FS3 is a standard implementation using an array of matched PNP transistors to generate the PTAT (Proportional to Absolute Temperature) term.
The S3BG0V8T90FS3 has been implemented on standard 90nm LP Flash process. However it is readily portable to any similar manufacturing process. Any activity of this nature can be fully supported.
- 90nm TSMC Logic LP Flash Process, 5 Metals Used
- (No Analog Options) with Deep-Nwell
- 3.0V ~ 3.6V Power Supply Voltage
- 0.8V +- 1.8% Output Voltage
- Compact Die Area: 0.032mm2
- Power Down Mode
- A wide temperature and supply voltage independent reference voltage of 0.8V is generated.
- The maximum spread of the output voltage is +/-1.8%.
- Both voltage and current output provided
- The area of the Bandgap is 0.068mm2.
- Deep-Nwell option used.
- Characterization Report
- Flat Netlist (cdl)
- Layout View (gds2)
- Abstract View (lef)
- Timing View (lib)
- Behavioral Model (Verilog/VerilogA)
- Integration Support
- Reference Generation
- Current and Voltage Regulation
- General Mixed Signal Products
Block Diagram of the Bandgap Reference - TSMC 90nm LP