English
Always-on Voice Activity Detection interfacing with analog microphones
You are here:
Bandgap Voltage / Current Reference UMC
The agileBandGapGP consists of a bandgap reference core together with a bandgap reference voltage generator (VREF), VREF replica current generators and bias current generators. The number of output bias currents can be specified up to a maximum of 16 configurable outputs. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable, leading to analog IP that is more verifiable, more robust and more reliable.
View Bandgap Voltage / Current Reference UMC full description to...
- see the entire Bandgap Voltage / Current Reference UMC datasheet
- get in contact with Bandgap Voltage / Current Reference UMC Supplier
Block Diagram of the Bandgap Voltage / Current Reference UMC IP Core
LDO IP
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL
- 5nm FinFET, 20mA LDO Voltage Regulator (Power Quencher™)
- 40nm 1.8V Programmable 1.1V LDO Regulator with 50mA max. output
- Power Quencher® Capless LDO for SoC Integration and Hardware Security (22 nm, 500 mA, excellent quiescent current for IoT)
- Power Quencher® Capless LDO for SoC Integration and Hardware Security (22 nm, 0.1 mA, excellent quiescent current for IoT)
- Capless 1.8V output LDO with 2.0-3.6V input range - SMIC 0.18 EF