Cache controller including Retention Ready feature for fast CPU wake-up time and very low power consumption
R-Stratus LPRR provides the twofold advantage of speed improvement and of power consumption minimization.
AMBA 3 AHB-lite compliant.
R-Stratus LPRR includes a Retention Ready feature to allow fast CPU wake-up from deep sleep mode.
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Block Diagram of the Cache controller including Retention Ready feature for fast CPU wake-up time and very low power consumption
![Cache controller including Retention Ready feature for fast CPU wake-up time and very low power consumption Block Diagam](http://www.design-reuse.com/sip/blockdiagram/49441/9-main-Cache-controller-including-Retention-Ready-feature-for-fast-CPU-wake-up-time-and-very-low-power-consumption.png)
Cache Controller IP
- 64-bit CPU Core with Level-2 Cache Controller
- AHB Cache Controller Core
- Cache controller for fast NVM memories access and very low power consumption
- Cache controller including Retention Ready feature for fast CPU wake-up time and very low power consumption
- AXI system Peripheral IP, Cache Controller, L2 Cache, Soft IP
- Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface