Design & Reuse
Catalog of SIP Cores
Silicon on Chip design resources

Camera MIPI D-PHY v1-1 1.5Gbps / sub-LVDS combo Receiver 4-Lane

The CL12662K4R1AM2JIP1500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processer) and DSP. The CL12662K4...