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MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
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Capless Analog LDO Regulator
HCLTech offers a low drop-out (LDO) voltage regulator that has been designed in a 40nm GF technology. It offers benefits of low dropout voltage, micropower operation and miniaturized packaging. The core of LDO voltage regulator consists of error amplifier, pass transistor. Capless LDO regulator(hcl_gf_40_ldo_3p3v_1p8v_15ma) is designed for the input voltage of 3.3V and 15mA output current. The area of the regulator is (300×300) sq.µm. The quiescent current is 153µA and is stable over the entire range of output load current (0 mA to 15 mA).
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Block Diagram of the Capless Analog LDO Regulator IP Core
Voltage Regulator IP
- Low Noise, On-Die, Localized Voltage Regulation
- Scalable, On-Die Voltage Regulation for High Current Applications
- LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
- LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output
- Linear Low-Dropout Regulator (Output Voltage 0.9V)
- Linear Low-Dropout Regulator (Output Voltage 0.6V)