Clock/Data Recovery PLL

The MXLCDR is a clock/data recovery PLL implemented using a digital CMOS process. It is highly integrated and require no external components. Differential circuit techniques are employed to attain low jitter in the noisy environment typical of multi-million gates digital chip.
The circuit is designed in a modular fashion and desensitized to process variations. This facilitates process migration, and results in a robust design.

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