CoreGuard is an IP solution designed to integrate with leading processors to provide comprehensive security in hardware, at the root of a system. CoreGuard is delivered as a licensed design file and is currently compatible with RISC processor cores. CoreGuard is optimized for IoT & embedded devices. Available for ASIC & FPGA.
Integrates with existing processor cores
Enforces Software Defined Metadata Policies
Flexible Software Defined Policies enforced by a decoupled hardware interlock
Policies checked at every instruction
No instruction fully commits before passing policy verification - stops attacks before they start
Configurable size Policy Rule Cache accelerates software defined rule execution to match application processor throughput
Optional RISC-V policy execution core, for highest performance, or run policies on Application Processor for area-critical designs
Flexible memory mapping of tag locations and sizes
AXI4 and AHB interconnect options
One & done hardware security: delivering all the security needed to defend against network-based attacks. No more reactive, after-the-fact software.
Customizable & updatable protection: offering patented micro-policy security rules that can be updated at any time. Should needs exceed standard security, customers can create policies to match specific criteria.
Known & unknown attack defense: blocking entire classes of attack to eliminate all network- based attacks. Plus, no more zero-day threats.
Broad & flexible compatibility: protecting most existing cores, applications, and systems. Retain existing technology, up and down the stack.
MCU Kit 1.0: FPGA bitstream synthesized for Kintex-7 running on Digilent Genesys 2 development board
SDK 2.0: Modified GNU toolchain, functional software simulator, comprehensive technical documentation, performance profiling tools. Delivered as a VM.