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130nm FTP Non Volatile Memory for Standard CMOS Logic Process
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Configurable 8-bit 230MS/s or 10-Bit 27MS/s SAR ADC
The S3ADS230M10BT40LP is a 10 / 8 bit configurable High-Speed SAR ADC IP. This ADC, in 8-bit mode sampling at 230MS/s, features an excellent dynamic performance including -50.0dB THD, 47.6dB SNR and 7.3-bit ENOB.
This high-end performance, including the Bandgap and Reference Buffer, is obtained with a compact die area.
The S3ADS230M10BT40LP can be cost-effectively ported
across foundries and process nodes upon request.
This high-end performance, including the Bandgap and Reference Buffer, is obtained with a compact die area.
The S3ADS230M10BT40LP can be cost-effectively ported
across foundries and process nodes upon request.
Features
- TSMC 40nm LP (Low Power Process)
- 1.1V and 1.8V Supplies
- 10 / 8 bit Configurable High-Speed SAR ADC
- 230MS/s (8-bit Mode) or 27MS/s (10-bit Mode) Sampling Rates
- Internal Bandgap and Voltage References Buffers Included
- No External Accurate Reference required
- No External Reference Decoupling required
- Differential Input Signal Range: 1.0Vppdiff
- Dynamic Performance (8-bit Mode):
- 50.0dB SFDR
- -50.0dB THD
- 47.6dB SNR
- 45.6dB SNDR
- 7.3-bit ENOB
- [Noise integrated up-to Nyquist]
- Power-Down and Standby Modes
Deliverables
- Datasheet
- Characterization Report
- Flat Netlist (cdl)
- Layout View (gds2)
- Abstract View (lef)
- Timing View (lib)
- Behavioural Model (Verilog .v)
- Integration Guidelines and Support
- (Subject to Agreement)
Applications
- Video Communications
- DVB
- Home Network
- Imaging
Block Diagram of the Configurable 8-bit 230MS/s or 10-Bit 27MS/s SAR ADC
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