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Configurable 8-bit Microcontroller

The SS M8051TC is fully instruction set compatible to standard 8051 and provides all external interface signals that legacy core provides. The design of SS M8051TC can be configured to derive legacy 8051 whose machine cycle is of 12 clock cycles and also turbo version of 8051 which takes 4 clock cycles per machine cycle. The Turbo version features a faster running CPU and improves performance by an average of 1.5 to 3 times over legacy 8051. In turbo version, length of memory access due to MOVX instruction can be programmed between 2 to 9 machine cycles to work efficiently with both fast and slow memories/peripherals.
The Serial port has the enhanced features of Automatic Address recognition and Frame Error detection.

Features

Instruction set fully compatible with Intel 8051
Configurable for legacy 8051 that takes 12 clocks per machine cycle and turbo 8051 which takes 4 clocks per machine cycle
Programmable length of MOVX memory access cycle to work with fast and slow memories/peripherals in Turbo version
Internal 256 byte scratch pad RAM space and 128-byte SFR address space
64KB Program memory address space and 64KB Data memory address space
Configurable depth of internal data memory and internal program memory up to 64KB
Interface for Reset on power up/power fail and early power failure interrupt
Three priority level interrupt structure with 8 interrupt sources
Provides standard peripheral functions like Serial Port, three functionally different 16-bit timers
Configurable SFR address space and Interrupt controller facilitate easy integration of any new peripheral

Benefits

SoC integration
Customization

Deliverables

Fully synthesizable Verilog RTL source code
Documentation - Data Sheet, User Guide, Verification Description Document
Self checking Verification Suite
Synthesis and STA Scripts

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