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Configurable AES Core with APB or AHB interface
eSi-AES is a range of sophisticated AES cores for use in ASIC or FPGA technologies. They can be configured to customer the requirements to enable a flexible trade-off of key size, modes and throughput with area to get the most optimized solution. The base suite consists of Encryption, Decryption, Key Expansion and Cryptographic Mode modules that together cover all the combinations required for encryption and authentication. All modules support the three key sizes, dynamically selectable per-packet.
For the lowest gatecount the modules can be configured to support only one key size. In addition all modules are available with AMBA AHB or APB interfaces.
For the lowest gatecount the modules can be configured to support only one key size. In addition all modules are available with AMBA AHB or APB interfaces.
Features
- Simple register based interface
- Run-time support for 128, 192 and 256 bit keys
- 14, 16 and 18 clock cycle cipher/decipher for 128-bit/192-bit/256-bit keys respectively
- 130x faster than a software only implementation
- Integrated key expansion
- Cipher-Block-Chaining (CBC) / CBC-MAC support
- Counter chaining (CTR) support
- Galois Counter Mode (GCM)
- Galois Message Authentication Code (GMAC) support
- Support for CCM/CCM* through software sequencing of CBC-MAC and CTR
- AMBA 3 APB or AHB slave interface
Deliverables
- RTL source code
- Testbench
- Synthesis and STA scripts
- Comprehensive documentation
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