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Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications
The complete silicon-proven DesignWare® IP solution, consisting of configurable digital controllers, PHYs, IP Prototyping Kits and verification IP, is designed to meet all required features of the PCI Express® (PCIe®) 5.0, 4.0, 3.1, 2.1, 1.1, and PIPE specifications. By providing a complete IP solution, Synopsys delivers optimization across the individual IP to lower latency and ensures that all the IP functions seamlessly together to lower integration risk. The highperformance PCI Express IP solution is extremely low in power and area. The high-quality IP solution has been extensively validated with multiple hardware platforms, PHYs, and PCIe verification suites across a broad range of processes and foundries. With thousands of design wins and products shipping in volume, Synopsys’ expertise in developing and supporting the PCI Express interface enables designers to accelerate time-to-market and achieve silicon success for their advanced SoCs.
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Video Demo of the Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications
This demo video shows a complete end-to-end CCIX link operating at up to 25 Gb/s data rates, featuring the Synopsys CCIX PHY and controller IP. The demo highlights the advanced debug, error injection, and statistical analysis features as well as importance of setting the correct payload size for maximum throughput. The IP is CCIX 1.1 ready and can support operation at 32 GT/s.
PCIe IP
- PCIe Controller Testbench
- PCIe 5.0 PHY in TSMC (16nm)
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
- 56G Serdes in 7nm bundled with PCie Gen 5 controller IP
- PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
- PCIe 6.0 SerDes PHY