Configurable Multi-Viewer
The Configurable Multi-Viewer is available with complete Verilog source code, Verilog test bench and bit-accurate C models as part of the license. Integration and programming guidelines are also included backed up by expert technical support.
A Configurable Multi-Viewer reference design is available for standard development kits from Xilinx and Altera for demonstration and evaluation purposes. In addition to simplifying the evaluation of the Configurable Multi-Viewer IP core, the design also serves as a template for customer application development.
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Multi-Viewer IP
- TSMC CLN7FFLVT 7nm Multi Phase DLL - 1200MHz-6000MHz
- Complete PCIe 4.0 Soft IP supporting endpoint, root port, switch, bridge and advanced features such as SR-IOV, multi-function, data protection (ECC, ECRC), ATS, TPH, AER and more
- Enhanced Multi-Format Encoder Supporting AV1
- 1080p60 Multi-Format Decoder IP
- 4K/8K Scalable Multi-Format Video Decoding IP Core
- Fully Self-contained Single/Multi Port USB Type-C Power Delivery IP